Project Mission/Statement:
Material innovations form the foundation of new electronics. It is our mission to provide fundamental understanding of material properties and seek creative connections to new application possibilities. We invent process techniques and system architectures to exploit their technological capabilities and potentials. We aspire “to boldly go where no man has gone before … “- Captain James T. Kirk, Star Trek.
Funders/partners: Singapore National Research Foundation, A*Star Programmatic Fund, Industry Partners
2D Materials:
(Left) Plasma oxidation of 2D Tungsten Di-Selenide achieving near atomic control of 2D stack thickness . (Right) Setting drivw performance records on 2D WSe2 transistor enhancement due to plasma-oxidation enhanced contacts and channel.
Soft Composite Functional Materials
Elastomer hybrids and composites with embedded electronic properties (conductors, triboelectric, capacitive, Etc.)
Project Mission/Statement:
Much of today’s machine learning and AI algorithms exist mostly in the software stack that is executed by the underlying CMOS digital electronics. To break the low energy barrier of AI computation, we will need to develop accelerators where the hardware is optimized for Non- von Neumann architectures. We explore analog computing and new in-memory compute technologies that expand and augment CMOS technologies We are solving device–to–system issues that relate to fault tolerance, devices/process integration, system approaches.
Funders/partners: A*Star Programmatic Fund, Industry Partners
New AI computing architectures
(Left) 3D Monolithic integration of oxide semiconductor devices to enable 3D-IC of logic and memory units
(Right) Staggered memory array that significantly accelerates deep convolution neural network computation with memristors
Project Mission/Statement:
There are no perfect sensors, the environment is messy and noisy. No problem! Solution for a performant sensing systems can be achieved if sensors and sensing algorithms can cooperate intimately to overcome shortcomings. We investigate cross enablement of field sensing, bio-sensing with data analytics. We are solving issues that relate to sensor drifts, low-signal-to-noise, environmental interferences and low-energy resource compute and compact form-factor.
Funders/partners: Singapore National Research Foundation, Industry partners
Project Mission/Statement:
TBD
Funders/partners: TBD
Project Mission/Statement:
Although Moore’s law is entering its twilight years with costly manufacturing, next-generation microelectronics are still in great demand for the development of upcoming Internet of Things (IoT) technologies; ranging from wearable electronics to smart home products that can link and communicate with each other. These technologies play an increasingly important role in the future technologies for healthcare, AI, communications, to infrastructures. These insatiable demands require accessible and innovative microelectronics. In particular, for consumer-driven applications like IoT, there is an inherent need for low-volume-high-mix type design and manufacturing, which runs counter to the semiconductor foundry-based design and manufacturing model, in particular for small medium-sized enterprises (SMEs) to access the latest-and-greatest semiconductor technologies. By developing hybrid microsystems that combine foundry semiconductor chip technologies and disruptive material innovations, we hope to capture value at the system level that differentiates from commercial off-the-shelf approaches, and all without the need for prohibitively expensive advanced semiconductor fab infrastructures. Catering to SMEs for IoT, healthcare, wearables, automotive component makers, we believe such hybrid electronics can enable next-generation microelectronic manufacturing.
SHINE aims to develop hybrid electronics that is easy to design while capable of sophisticated systems that combine material, chip, and large-area form factor innovations. Through co-design of material, components and system co-design, SHINE seeks to develop heterogeneous integration process that extends from wafer/chip level packaging to large-area format and non-conventional substrates.
Funders/partners: Singapore National Research Foundation, AStar, SOITEC, POET.
Project Mission/Statement:
The sense of smell provides us with the capability of perceiving the chemical atmosphere that contains rich information, such as perfume quality, food freshness, and human health status. Human or animal olfactory detection and evaluation of smell suffers from fundamental limitations of subjectiveness, poor reproducibility, and difficulty in mass deployment, and so manmade technologies including chemical analytical instruments and electronic noses (e-noses) that generate objective and reproducible results are invented to overcome these problems. However, current technologies can’t satisfy all the requirements for mass deployment with quantifiable data and intelligible feedback. To fill this gap, we propose an olfactory system-inspired data-centric approach called Scent Digitalization and Computation (SDC) to analysing complex scent mixtures for objective scent evaluation.
The SDC project embraces innovations in both sensor hardware and data analytics as shown in below figure. The scent profiling array (SPA) works as sensor hardware and scent index (SI) is designed for data analytics interface. SPA integrates sensor development from multiple levels including materials, devices, and circuits. SI implements data analytics to boost accuracy and capability of scent sensing.
Funders/Partners: A*Star Programmatic Fund, Nanyang Technological University, A*Star,Wilmar
Project Mission/Statement:
The programmatic endeavours to enable the unprecedented chemo-sensing of solid phase analytes on fluid-free surfaces, a concept that holds tremendous potential across a plethora of applications. For instance, enhancing food security through on-site pesticide/toxicity detection on the surfaces of fruits or plants represents a valuable use-case. Or employing similar technique on indoor or outdoor surfaces can contribute to monitoring environmental conditions or contaminants. Moreover, in-situ real-time chemo-sensing of on-skin metabolites offers immense merit towards human health monitoring. We will build such a platform by addressing three main scientific challenges: 1) How to allow for chemosensing without a fluidic medium? 2) How to develop an electrochemical chemo-sensor that is useful and usable – i.e. stable, sensitive, selective? And 3) How to overcome electronic noise and environmental variation in the signal readout? By addressing these three challenges, we will successfully develop an integrated proof-of-concept device, and the programme places its primary emphasis on demonstrating one key use-case, specifically the monitoring of on-skin metabolites, in particular relating to cardiovascular health.
To illustrate the programmatic structurally, we have organised the three aforementioned scientific challenges as three parallel work packages (WP), each one being inter-dependent on the others to ultimately yield an integrated prototype. The three work packages are: WP1 Developing an adhesive solvation-diffusion interface for solid-state analytes on soft surfaces; WP2 Developing all-rounded ‘Omnizymes’ (stable, selective, sensitive enzymes for sensing) or sustainable chemosensing; and WP3 Developing a single hybrid robust electronics platform for multimodal sensing integration.
Funders/Partners: A*Star Programmatic Fund, Nanyang Technological University, A*Star
Project Mission/Statement:
State-of-the-art deep neural networks (DNNs) are becoming increasingly complex, challenging edge computing platforms with limited power and area. To address this, we’re exploring computing-in-memory (CIM) solutions, which minimize data movement by embedding computation within memory arrays. Our focus is on monolithic 3D (M3D) architectures, which offer superior area and energy efficiency compared to traditional 2D designs. We’re specifically investigating 1T1R (one-transistor, one-resistor) synapse arrays for M3D integration, aiming for low-temperature processing and excellent electrical performance. Funded by the leading semiconductor industry SK Hynix, through system technology co-design (STCO), we are developing of BEOL compatible materials (Oxide & 2D material) beyond silicon to achieve advanced CIM technology.
Funders/partners: SK Hynix, South Korea
Project mission/statement:
Over the last decade, extensive research has been conducted on the growth of high-quality 2D TMDC materials at a wafer scale. However, the development of transfer-free and low-temperature techniques remain challenges. Therefore, we are investigating sheet devices with multiple layers of WSe2 channels using solution-processed technique, with precisely controlled thickness down to the atomic scale. Our exfoliation method, incorporating electrochemical intercalation and Langmuir-Schaeffer liquid assembly, enables wafer-scale deposition and efficient stacking of 2D TMDC materials under low-temperature, transfer-free processing. This novel, cost-effective approach enhances stacking efficiency and conformality, facilitating the demonstration of GAA cFET.
Funder/partners: TSMC, Intel, Semiconductor Research Cooperation (SRC)
Project Mission/Statement:
Systematic and comprehensive study the development of spatially controlled assembly of solution-processed van der Waals heterostructures (vdWH) and their applications in large-scale electronics and optoelectronics. In detail, we aim to achieve the following targets: (1) develop efficient method to improve the monodispersity of 2D materials (I.e., MoS2, WSe2, h-BN and graphene) dispersions. (2) Improve the film uniformity by developing spatially controlled assembly of vdWH with surface functionalization to enhance large plane-to-plane alignment. (3) Implement physical-charge-based characterization (atomic force microscopy) with detailed modelling of percolation transport and light-matter interaction study with time-resolved photoluminescence (TRPL) and continuum full-band quantum transport models for the vdWH films.
Funders/partners: Ministry of Education, Singapore
Project Mission/Statement:
In the pursuit of more powerful computing systems, researchers are exploring Integrated photonic circuits to enhance computational capabilities. However, running tasks on photonic circuits often requires external high-bandwidth memory (HBM) to store information, which cause unexpected latency and power consumption. Therefore, we are investigating ferroelectric photonic memory which is a new-class photonic device, aiming for localizing memory functionality in photonic circuits. Furthermore, based on such novel device, we are developing in-memory reconfigurable photonics circuit without incurring any static power consumption.
Funders/partners: POET Technologies, A*Star Programmatic Fund
Project Mission/Statement:
Recently, fifth generation (5G) communication and defense/aerospace applications are driving silicon-interposer technique for RF applications. The heterogeneous integration of III-V HEMT devices on silicon interposer in 2.5D/3D manner brings various advantages such as high density package, fine pitch re-distribution lines, excellent gain, and low transmission loss. The packaging density is increased dramatically while thermal dissipation issue is becoming one of the top challenges for heterogeneous integration, especially when the RF devices are working under high power conditions to answer the high demand of data transmission rate for real time streaming, auto-pilot of driverless car and IOT controls. In order to tackle the thermal management issue of high-power RF amplifiers, many methods are introduced into the system, such as metal heatsink, water pipes/ chamber, phase change material and liquid metal etc.
The project proposes a new low-cost interposer structure made from two-layered hybrid substrate. This hybrid structured interposer design will be used for high power RF system packaging and heterogenous IC integration to overcome the heat trapping or dissipation issues of conventional silicon interposer substrate.
Currently, we are working with Soitec and A*STAR IME to develop hybrid interposer substrates for advanced packaging such as 3D IC packaging, fan-out packaging, and chiplet packaging. The application environment of these hybrid interposer substrates is high power consumption devices in high density packaging such as high-power RF application and high-performance computing.
Funders/Partners: Soitec, A*STAR IME
